Synopsys' JupiterXT Tool Cuts Prototyping and Implementation Time on Cavium Networks' Octeon MIPS64 Processors
Automated Prototyping Flow Delivers Predictable Time-to-Tapeout
MOUNTAIN VIEW, Calif., May 25 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Cavium Networks, a leader in security, network services, and embedded processor solutions has successfully deployed Synopsys' JupiterXT(TM) design planning tool to develop prototype and final floorplans for its OCTEON(TM) family of multi-core MIPS64(R) processors. Using the JupiterXT design planner, Cavium Networks was able to automatically generate and evaluate several prototype floorplans using varied inputs and then evaluate which would meet their implementation design goals. The ability to accurately predict key characteristics of the design, including timing and routability, during prototype floorplanning allowed Cavium Networks' designers to pick the best floorplan to meet timing and area constraints. This resulted in significant productivity gains, fewer design iterations, and faster time-to-market.
"Cavium needed a physical prototyping solution that would meet our performance goals, yet would be easy to implement," said Anil Jain, vice president of IC Engineering at Cavium Networks. "The JupiterXT tool was deployed as part of the Synopsys Galaxy(TM) Design Platform and achieved the promised productivity improvements. Prior to adopting the JupiterXT tool, our designers custom-placed all macros. This method was time-consuming and limited our ability to explore alternative implementations. The automated macro placement capability in the JupiterXT tool significantly reduced the amount of work required to come up with a final floorplan. Final results that met our goals were achieved in hours, automatically. We are seeing results superior to hand-placement in terms of congestion and timing for complex blocks."
The JupiterXT design planner enables new users to automatically generate prototype floorplans quickly, easily, and automatically. It provides a web-enabled reporting mechanism that allows users to evaluate results and quickly make decisions on how to proceed.
"The new capabilities within the JupiterXT design planner make the process of creating a high-quality floorplan more predictable than before," said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "Market leaders like Cavium recognize that this prototyping technology is an essential component in meeting their aggressive design goals and schedules."
About Synopsys
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com.
NOTE: Synopsys is a registered trademark of Synopsys, Inc. Galaxy and JupiterXT are trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
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Synopsys, Inc.
650-584-5707
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Edelman
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CONTACT: Janet Berkman of Synopsys, Inc., +1-650-584-5707, or
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